Quatech MPA-200 Manuale Utente Pagina 1

MPA-200/300RS-422/485 SYNCHRONOUSADAPTER CARDfor ISA compatible machinesUser's ManualQUATECH, INC. TEL: (330) 655-90005675 Hudson Industrial Park

2 HARDWARE INSTALLATIONIf the default address and interrupt settings are sufficient, the MPA-200 can bequickly installed and put to use. The factory d

3 SCC GENERAL INFORMATIONThe Serial Communications Controller (SCC) is a dual channel, multi-protocoldata communications peripheral. The MPA-200 pro

3.1 Accessing the registersThe mode of communication desired is established and monitored through the bitvalues of the internal read and write registe

Example 3: Write data into the transmit buffer of channel A.mov dx,base ; load base addressout dx,al ; write data in ax to buffer Example 4: Rea

clock (TCLK) and the RTXC pin for its receive clock (RCLK). Programming ofthe clocks should be done before enabling the receiver, transmitter, BRG, or

3.2 Baud Rate Generator Programming The baud rate generator (hereafter referred to as the BRG) of the SCC consists ofa 16-bit down counter, two 8

3.3 SCC Data Encoding MethodsThe SCC provides four different data encoding methods, selected by bits D6 andD5 in WR10. These four include NRZ, NRZI, F

4 JUMPER BLOCK CONFIGURATIONSThe MPA-200 utilizes seven user-selectable jumper blocks , that allow the usermore flexibility when configuring the board

5&10IRQ154&9IRQ143&8IRQ122&7IRQ111&6IRQ104.3 J10 - Transmit DMA Channel SelectionJ10 selects the DMA channel to be used for transm

4.4 J11 - Receive DMA Channel SelectionJ11 selects the DMA channel to be used for receive DMA. Three channels (1 - 3)are available on the MPA-200 for

Table 10 Jumper block J7 connections5&6Receiver controlled by Comm. Register 4&5Receiver Always Enabled2&3Transmitter controlled

5 ADDRESSINGThe MPA-200 occupies a continuous 8 byte block of I/O addresses. For example,if the base address is set to 300H, then the MPA-200 will occ

The first four bytes, Base+0 through Base+3, of address space on the MPA-200contain the internal registers of the SCC. The next two locations Base+4

6 INTERRUPTSThe MPA-200 supports eleven interrupt levels: IRQ2 -7, IRQ10 - 12, and IRQ14- 15. The interrupt level is selected through jumper blocks

7 DIRECT MEMORY ACCESSDirect Memory Access (DMA) is a way of directly transferring data to and frommemory, resulting in high data transfer rates with

of the SCC, a DMA request is generated. The DMA controller then writes the datafrom the SCC into memory. Programming for DMA request on both transmit

Figure 3 Block diagram of DMA on MPA-200.W/REQADTR/REQAW/REQBSCCDMATRQDRMRRQJ10J11PAL7.1 Using Terminal Count to Generate an InterruptThe MPA-200 al

8 CONFIGURATION REGISTERThe MPA-200 is equipped with an onboard register used for configuring informa-tion such as DMA enables, DMA sources, interrupt

D1 -RXSRC, RECEIVE DMA SOURCE:When set (logic 1), this bit allows the source for receive DMA tocome from the W/REQB pin of channel B on the SCC. Wh

9 COMMUNICATIONS REGISTERThe MPA-200 is equipped with an onboard communications register which givesthe user options pertaining to the clocks and test

Warranty InformationQuatech Inc. warrants the MPA-200/300 to be free of defects for one (1) year from the date of purchase. Quatech Inc

D3 -RECEIVE CLOCK ENABLE (DCE only):When set (logic 1), this bit allows the DCE to transmit its receiveclock (RCLK). When cleared (logic 0), the DC

10 DTE / DCE ConfigurationThe MPA-200 can be purchased in either Data Terminal Equipment (DTE) orData Communications Equipment (DCE) configuration. Th

10.1 DTE ConfigurationThe control signals that the DTE can generate are the Request To Send (RTS) andData Terminal Ready (DTR). It can receive the sig

10.2 DCE ConfigurationOn the MPA-200, the difference between the DTE and DCE signals is that, withthe exception of a few control signals, the pins use

Figure 3 DCE Clock ConfigurationTRXCARTXCARTXCBRRCLKRTCLKTRXCBRCKENTTCLKTCKEN(RCLK)(TCLK)The Test Mode (TM) signal is always in the OFF condition and

11 EXTERNAL CONNECTIONSWhen configured as a DTE, the MPA-200 uses a D-25 short body male connector(labeled CN2). When configured as a DCE, the MPA-200

Table 16 DCE Connector Pin DefinitionsAlways ZeroTEST MODE25TRXC+RRCLK24DCDA-DSR23DTR/REQA-DTR22No Connect21DCDA+DSR20CTSA-CTS19No Connect18TRXCA+TTCL

Figure 4 MPA-200 DTE Output Connector25 TEST MODE24 +TTCLK23 -DTR22 -DSR21 RLBK20 +DTR19 -RTS18 LLBK17 +RRCLK16 -RXD15 +RTCLK14 -TXDCGND

11.1 MPA-200 and EIA-530 CompatibilityIf the MPA-200 is to be connected with an EIA-530 device, it may be necessary toswap the +/- conductors on the T

12 DEFINITION OF INTERFACE SIGNALS CIRCUIT AB - SIGNAL GROUND CONNECTOR NOTATION: DGND DIRECTION: Not applicableThis conductor directly connects t

The information contained in this document cannot be reproduced in any formwithout the written consent of Quatech, Inc. Likewise, any software progra

CIRCUIT DB - TRANSMIT ELEMENT TIMING (TxClk - DCE Source) CONNECTOR NOTATION: +RTCLK,-RTCLK DIRECTION: From DCEThis signal, generated by the DCE, pr

CIRCUIT CD - DTE READY (DTR) CONNECTOR NOTATION: +DTR,-DTR DIRECTION: To DCEThis signal controls the switching of the DCE to thecommunication channe

CIRCUIT TM - TEST MODE (TM) CONNECTOR NOTATION: TEST MODE DIRECTION: From DCEThis signal indicates to the DTE that the DCE is in a test condition.Th

13 SPECIFICATIONS Bus interface: IBM AT 16-bit bus Controller: Serial Communications Controller, 6 MHz (determined by

MPA-200/300User's ManualVersion 5.31March 2004Part No. 940-0038-531

Compliances - Electromagnetic EmissionsEC - Council Directive 89/336/EECThis equipment has been tested and found to comply with the limits of thefollo

TABLE OF CONTENTS3713 SPECIFICATIONS...3312 DEFINITION OF INTERFACE SIGNALS ...3211.2 Null-Modem Cables ...

3 Quatech Inc., MPA-200/300 Manual

1 INTRODUCTIONThe Quatech MPA-200/300 is a single channel, synchronous serial communica-tion port for systems utilizing the architecture of the IBM AT

Figure 1 MPA-200 board drawingQuatech, Inc.MPA-200U1U2SW1 SW2U3U4U5U6U7U8X1U16U9U10U11U12U13U14U15U21U17J10J11J5 J6J4CN2CN1U22U23U26U18U19U20U25J8J7U